抄録
In this brief, we present a four-quadrant CMOS current-mode multiplier based on the square-law characteristics of an MOS transistor operated in the saturation region. One advantage of this multiplier is that the output current is independent of MOS transistor device parameters; another, that the input resistance is independent of the input current. Simulations of the multiplier demonstrate a linearity error of 1.22%, a THD of 1.54%, a -3-dB bandwidth of 22.4 MHz, and a maximum power consumption of 0.93 mW. Operation of the multiplier was also confirmed through an experiment using CMOS 4007 IC's.
本文言語 | 英語 |
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ページ(範囲) | 473-477 |
ページ数 | 5 |
ジャーナル | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing |
巻 | 47 |
号 | 5 |
DOI | |
出版ステータス | 出版済み - 2000 |
ASJC Scopus 主題領域
- 信号処理
- 電子工学および電気工学