Abstract
In this brief, we present a four-quadrant CMOS current-mode multiplier based on the square-law characteristics of an MOS transistor operated in the saturation region. One advantage of this multiplier is that the output current is independent of MOS transistor device parameters; another, that the input resistance is independent of the input current. Simulations of the multiplier demonstrate a linearity error of 1.22%, a THD of 1.54%, a -3-dB bandwidth of 22.4 MHz, and a maximum power consumption of 0.93 mW. Operation of the multiplier was also confirmed through an experiment using CMOS 4007 IC's.
| Original language | English |
|---|---|
| Pages (from-to) | 473-477 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing |
| Volume | 47 |
| Issue number | 5 |
| DOIs | |
| State | Published - 2000 |
ASJC Scopus subject areas
- Signal Processing
- Electrical and Electronic Engineering