@inproceedings{10477c2b5ab9464194e041a1f7d3ceaa,
title = "Clock-feedthrough compensated digital-to-analog converters",
abstract = "Switched-capacitor (SC) digital-to-analog (D/A) converters which are insensitive to clock-feedthrough charge caused by MOS analog switches, offset- and gain-error of unity gain buffers (UGB) are presented. Because their configurations are based on UGB, the conversion rate is estimated to 90 Mb/s. Resolution of the proposed converter is limited by top plate parasitic capacitance and can be reached till 9 bit.",
author = "Hiroki Matsumoto and Zheng Tang and Okihiko Ishizuka",
year = "1991",
language = "英語",
isbn = "0780300815",
series = "Midwest Symposium on Circuits and Systems",
publisher = "Publ by IEEE",
pages = "744--747",
booktitle = "Midwest Symposium on Circuits and Systems",
note = "33rd Midwest Symposium on Circuits and Systems ; Conference date: 12-08-1990 Through 15-08-1990",
}