A buffer-based switched-capacitor integrator with reduced capacitance ratio

Hiroki Matsumoto*, Zheng Tang, Okihiko Ishizuka

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A novel buffer-based switched-capacitor (SC) integrator integrable by a method of reducing the capacitance ratio is presented. By this method, a high-Q SC filter can be made by realizable capacitance ratio on CMOS process. The proposed integrator can also be operated over wide frequency range because it uses a unity gain buffer (UGB).

Original languageEnglish
Title of host publicationMidwest Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages719-720
Number of pages2
ISBN (Print)0780300815
StatePublished - 1991
Event33rd Midwest Symposium on Circuits and Systems - Calgary, Alberta, Can
Duration: 1990/08/121990/08/15

Publication series

NameMidwest Symposium on Circuits and Systems
Volume2

Conference

Conference33rd Midwest Symposium on Circuits and Systems
CityCalgary, Alberta, Can
Period1990/08/121990/08/15

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'A buffer-based switched-capacitor integrator with reduced capacitance ratio'. Together they form a unique fingerprint.

Cite this