Characteristics of new single phase voltage doubler rectifier circuit using the partial switching strategy

Kenji Amei*, Akito Kumagai, Takahisa Ohji, Kyohei Kiyota, Masaaki Sakui

*この論文の責任著者

研究成果: 会議への寄与学会論文査読

3 被引用数 (Scopus)

抄録

In this paper, the new partial switching single phase voltage doubler rectifier circuit which can improve efficiency drastically is proposed. The partial switching circuit is circuit to realize boost and harmonic reduction, high efficiency in a good balance. The proposed circuit is different from conventional circuit[1] in the point that component of the partial switching is connected to DC side. Because current flowed through the different diode in partial switching and commutation in conventional circuit, the efficiency dropped. Because current flows through the same diode with both situations in proposed circuit, the efficiency is improved. With disposition to the DC side of the component of the partial switching, the diode which prevented the short circuit of the capacitor was necessary. But, the drop of the efficiency was suppressed at the minimum by operating two MOS-FET as synchronous rectification. The operating characteristic was inspected in experiment, and it was evaluated boost, harmonic current and efficiency. While equal performance about boost and harmonic current is maintained, 2-3% of efficiency was improved in comparison with conventional circuit[1]. In this paper, circuit configuration and a principle of operation, experimental results are reported.

本文言語英語
ページ1107-1111
ページ数5
DOI
出版ステータス出版済み - 2018/02/09
イベント12th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2017 - Honolulu, 米国
継続期間: 2017/12/122017/12/15

学会

学会12th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2017
国/地域米国
CityHonolulu
Period2017/12/122017/12/15

ASJC Scopus 主題領域

  • 電子工学および電気工学

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