Synthesis of current-mode pass transistor networks

Okihiko Ishizuka; Hiroshi Takarabe; Zheng Tang; Hiroki Matsumoto

Synthesis of current-mode pass transistor networks

Okihiko Ishizuka^*, Hiroshi Takarabe, Zheng Tang, Hiroki Matsumoto

^*Corresponding author for this work

Intellectual Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The basic properties of the MOS current-mode circuits are considered, and the network synthesis for realization of unary multivalued functions is discussed. The main concern is the minimization of hardware realization. Functional blocks to compose a current-mode circuit from the viewpoint of a design cost are considered. Some decomposition methods of unary functions are proposed and their circuit realizations with MOS pass transistor networks are presented.

Original language	English
Title of host publication	Proceedings of The International Symposium on Multiple-Valued Logic
Publisher	Publ by IEEE
Pages	139-146
Number of pages	8
ISBN (Print)	0818621451
State	Published - 1991/05
Event	Proceedings of the 21st International Symposium on Multiple-Valued Logic - Victoria, BC, Can Duration: 1991/05/26 → 1991/05/29

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Conference

Conference	Proceedings of the 21st International Symposium on Multiple-Valued Logic
City	Victoria, BC, Can
Period	1991/05/26 → 1991/05/29

ASJC Scopus subject areas

General Computer Science
General Mathematics

Cite this

@inproceedings{0a42b6c2a8e546d6a87142e1582f3167,

title = "Synthesis of current-mode pass transistor networks",

abstract = "The basic properties of the MOS current-mode circuits are considered, and the network synthesis for realization of unary multivalued functions is discussed. The main concern is the minimization of hardware realization. Functional blocks to compose a current-mode circuit from the viewpoint of a design cost are considered. Some decomposition methods of unary functions are proposed and their circuit realizations with MOS pass transistor networks are presented.",

author = "Okihiko Ishizuka and Hiroshi Takarabe and Zheng Tang and Hiroki Matsumoto",

year = "1991",

month = may,

language = "英語",

isbn = "0818621451",

series = "Proceedings of The International Symposium on Multiple-Valued Logic",

publisher = "Publ by IEEE",

pages = "139--146",

booktitle = "Proceedings of The International Symposium on Multiple-Valued Logic",

note = "Proceedings of the 21st International Symposium on Multiple-Valued Logic ; Conference date: 26-05-1991 Through 29-05-1991",

}

Ishizuka, O, Takarabe, H, Tang, Z & Matsumoto, H 1991, Synthesis of current-mode pass transistor networks. in Proceedings of The International Symposium on Multiple-Valued Logic. Proceedings of The International Symposium on Multiple-Valued Logic, Publ by IEEE, pp. 139-146, Proceedings of the 21st International Symposium on Multiple-Valued Logic, Victoria, BC, Can, 1991/05/26.

Synthesis of current-mode pass transistor networks. / Ishizuka, Okihiko; Takarabe, Hiroshi; Tang, Zheng et al.
Proceedings of The International Symposium on Multiple-Valued Logic. Publ by IEEE, 1991. p. 139-146 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Synthesis of current-mode pass transistor networks

AU - Ishizuka, Okihiko

AU - Takarabe, Hiroshi

AU - Tang, Zheng

AU - Matsumoto, Hiroki

PY - 1991/5

Y1 - 1991/5

N2 - The basic properties of the MOS current-mode circuits are considered, and the network synthesis for realization of unary multivalued functions is discussed. The main concern is the minimization of hardware realization. Functional blocks to compose a current-mode circuit from the viewpoint of a design cost are considered. Some decomposition methods of unary functions are proposed and their circuit realizations with MOS pass transistor networks are presented.

AB - The basic properties of the MOS current-mode circuits are considered, and the network synthesis for realization of unary multivalued functions is discussed. The main concern is the minimization of hardware realization. Functional blocks to compose a current-mode circuit from the viewpoint of a design cost are considered. Some decomposition methods of unary functions are proposed and their circuit realizations with MOS pass transistor networks are presented.

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M3 - 会議への寄与

AN - SCOPUS:0026157167

SN - 0818621451

T3 - Proceedings of The International Symposium on Multiple-Valued Logic

SP - 139

EP - 146

BT - Proceedings of The International Symposium on Multiple-Valued Logic

PB - Publ by IEEE

T2 - Proceedings of the 21st International Symposium on Multiple-Valued Logic

Y2 - 26 May 1991 through 29 May 1991

ER -

Synthesis of current-mode pass transistor networks

Abstract

Publication series

Conference

ASJC Scopus subject areas

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